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  DEC Alpha

  Alpha, originally known as Alpha AXP, was a 64-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC), designed to replace the 32-bit VAX complex instruction set computer (CISC) ISA and its implementations. Alpha was...
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  SPARC

  SPARC (from Scalable Processor Architecture) is a RISC instruction set architecture (ISA) developed by Sun Microsystems introduced in 1986. SPARC is a registered trademark of SPARC International, Inc., an organization established in 1989 to promote the SPARC architecture and to provide conformance...
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  PA-RISC family

  PA-RISC is an instruction set architecture (ISA) developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer (RISC) architecture, where the PA stands for Precision Architecture. The design is also referred to as HP/PA for Hewlett Packard Precision Architecture. The...
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  x86-32 (32 bit Intel x86)

  IA-32 (Intel Architecture, 32-bit), often generically called x86, x86-32 or i386, is the instruction set architecture of Intel's most commercially successful microprocessors yet. It is a 32-bit extension, first implemented in the Intel 80386, of the earlier 16-bit Intel 8086, 80186 and 80286...
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  ARM architecture

  The ARM is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by ARM Limited. It was known as the Advanced RISC Machine, and before that as the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA in terms of numbers produced. They...
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  MIPS architecture

  MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by MIPS Computer Systems (now MIPS Technologies). The early MIPS architectures were 32-bit, and later versions were 64-bit....
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  PowerPC

  PowerPC (short for Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a RISC architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM. PowerPC, as an evolving instruction set, has since 2006 been renamed Power ISA but lives on as...
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  Intel Architecture-64

• Reduced instruction set computer

  The acronym RISC (pronounced as risk), for reduced instruction set computer, represents a CPU design strategy emphasizing the insight that simplified instructions that "do less" may still provide for higher performance if this simplicity can be utilized to make instructions execute very quickly....

• Harvard architecture

  The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape (24 bits wide) and data in electro-mechanical counters ....